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Wednesday, January 5, 2011

FETCH-DECODE AND EXECUTE CYCLE

BASIC OPERATIONAL CONCEPTS
Connections between the processor and the main memory



In Addition to the ALU and CU, The processor contains a number of register used for several different purposes.
The PC (Program Counter) contains the memory address of the instruction to be executed. During execution, the contents of the PC are updated to point to the next instruction. Every time that an instruction is to be executed, the program counter releases its contents to the internal bus and sends it to the memory address register.
The MAR (Memory Address Register) holds the address of the location to or from which data are to be transferred. As can be seen from the figure above, the connection of the MAR to the main memory is one-way or unidirectional.
The MDR (Memory Data Register) contains the data to be written or read out of the addressed location.
During the fetch operation, the MDR contains the instruction to be executed or data needed during execution. In write operation, MDR the data to be written into the main memory.
The IR (Instruction Register) contains the instruction that is being executed. Before the IR executes the instruction it needs to be decoded first. As soon as the content of the MDR is transferred to the IR, the decoding process commences. After decoding, execution of the instruction will take place.
Operating Steps
1. PC is set to point to the first instruction of the program (the operating system loads the memory address of the first instruction).
2. The contents of the PC are transferred to the MAR (which is automatically transmitted to the MM) and a Read signal is sent to the MM (Main Memory).
3. The addressed word is read out of MM and loaded into the MDR.
4. The contents of MDR are transferred to the IR. The instruction is ready to be decoded and executed.
5. During execution, the contents of the PC are incremented or updated to point to the next instruction.
Example
Enumerate the different steps needed to execute the machine instruction
ADD LOCA, R0
Assume that the instruction itself is stored in the main memory at location INSTR, and that this address is initially in register PC. The first two steps might be expressed as:
1. Transfer the contents of register PC to register MAR.
2. Issue a READ command to the main memory, and then wait until it has transferred the requested word into register MDR.
CPU Instruction Execution Steps
Instruction execution in a CPU can now be summarized by the following steps:
1. Fetching the instruction from the memory into the instruction register.
2. Incrementing the PC to point to the next instruction to be executed.
3. Determining the type of instruction fetched (instruction decoding).
4. Determining the location of data in the memory. If the instruction uses data.
5. Fetching the required data into internal CPU registers.
6. Executing the instruction.
7. Storing the results in the designated locations.
8. Return to Step 1.
This is commonly referred to as the fetch-decode-execute cycle.