g) Virtual Memory : Virtual memory is a concept which has an ability to address a storage space much larger than primary storage of a particular computer system. Virtual memory is present in the paging sytem. The paging system divides the program into a number of small parts, each part referred as page. And this division is done on logical addresses. So that the programmer does not have to make any decisions about how to divide the program. Paging is entirely transparent to the programmer. The hardware is already ensures that each memory reference and picking up the page base address to use. Using the protection bits. It is already make sure that each page referred to its validity. Each page must be in memory when a program is running. If a process page is not present in memory, an interrupt is generated. The operating system is employed to figure out which page was found to be missing, collect it from disk and changes the page table to indicate the page is now in memory and restarts the program. Swapping allows a number of programs to run at the same time and it is handled entirely by the system-overlays. And it also allows the user to move small parts of program in and out of memory. Virtual memory combines the good features of swapping and overlays. It is like overlays, that only part of the program is in memory at an instance, and the rest of its is not present on disk. The user can sees a large linear virtual address space. Only some parts of the virtual address space are present in physical memory. The rest of its “Virtual” and is reserved on the disk until needed. The disk contains an image of the entire virtual address space, even the parts that are in physical memory. The virtual memory system modules of the operating system maintains the illusion of the virtual memory by moving pages from disk to physical memory when they are needed.
h) Cache Memory : A special very-high speed memory called a cache is sometimes used to increase the speed of processing by making current programs and data available the CPU and a rapid rate. The Cache memory is employed in computer systems to compensate for the speed differential between main memory access time and processor logic. CPU logic is usually faster than main memory access time, with the result the processing speed is limited primarily by the speed of main memory. A technique used to compensate for the mismatch in operating speeds is to employ an extremely fast, a small cache between the CPU and main memory whose access time is close to processor logic clock cycle time. The cache is used for storing segments of programs currently being executed in the CPU and temporary data frequently needed in the present calculations. By making programs and data available at a rapid rate, it is possible to increase the performance rate of the computer. While the I/O processor manages data transfers between auxiliary memory and main memory, the cache organization is concerned with the transfer of information between main memory and CPU. Thus each is involved with a different level in the memory hierarchy system. The reason for having two or three levels of memory hierarchy is economics. As the storage capacity of the memory increases, the cost per bit for storing binary information decreases and the access time of the memory becomes longer. The auxiliary memory has a large storage capacity, is relatively inexpensive, but has low access speed compared to main memory. The cache memory is very small, relatively expensive, and has very high access speed. Thus as the memory access speed increase, so does its relative cost. The overall goal of using a memory hierarchy is to obtain the highest-possible average access speed while minimizing the total cost of the entire memory system. Auxiliary and cache memories are used for different purposes. The cache holds those parts of the program and data that are most heavily used, while the auxiliary memory holds those parts that are not presently used by the CPU. Moreover, the CPU has direct access to both cache and main memory but not to auxiliary memory.
i) Interrupt : Interrupts are used for any infrequent or exceptional event that causes a CPU to temporarily transfer control from its current program to another program. Interrupt handler services the event. Interrupt are the primary mean by which I/O device obtained the services. I/O interrupts are external requests to CPU to initiate or terminate an I/O operation. Interrupts are also produced by hardware or software error detection circuits that invokes error handling routines within the operating system. A power supply failure at any instance, generate an interrupt that request execution of an interrupt handler designed to save critical data about the system’s state. Interrupts generated internally by the CPU are called traps. An operating system will interrupt a user program that exceeds its allotted time. The basic method of interrupting the CPU is by activating a control line with the generic name INTERRUPT REQUEST that connects the interrupt source to CPU. An Interrupt indicator is stored in a CPU register. CPU register is tested periodically, usually at the end of every instruction cycle. On recognizing the presence of interrupt, CPU must execute a specific interrupt servicing program. A problem is caused by the presence of interrupt, CPU must execute a specific interrupt servicing program. A program is caused by the presence of two or more interrupt requests at the same time. Priorities must be assigned to the interrupts and the interrupt with higher priority is selected for service. When interrupt occurs, the following steps are taken by the CPU:
1. CPU identifies the source of the interrupt by polling I/O device.
2. The CPU obtains the memory address of the required interrupt handler
3. This address can be provided by interrupting device along with its interrupt request
4. The program counter(PC) and other CPU status information are saved in memory.
5. The Program counter (PC) is loaded with the address of interrupt handler. Execution proceeds until a return instruction is encountered, which transfer control back to the interrupted program.
j) Half duplex and full duplex transmission :Half duplex transmission system is one that is capable of transmitting in both directions but data can be transmitted in only one direction at a time. A pair of wires is needed for this mode. A common situation is for one modem to act as the transmitter and the other as the receiver. When transmission in one direction is completed, the role of the modems is reversed to enable transmission in the reverse direction. The time required to switch a half-duplex line from one direction to the other is called the turnaround time. A Full duplex transmission can send and receive data in both directions simultaneously. This can be achieved by means of four-wire link, with a different pair of wires dedicated to each direction of transmission. Alternatively , a two-wire circuit can support full-duplex communication if the frequency spectrum is subdivided into two non overlapping frequency bands to create separate receive and transmit channels in the same physical pair of wires.
The communication lines, modems, and other equipment used in the transmission of information between two or more stations is called a data link. The orderly transfer of information in a data link is accomplished by means of a protocol.
